blockDiscreteDAconverter

Digital to analog converter as discrete block (including zero order hold)
Diagram of DiscreteDAconverter

Extends from Interfaces.PartialDiscreteSISO_equality (Common discrete part of blocks extending from PartialSISO_equality).

Information

Parameters

TypeNameDefaultDescription
Realy_maxUpper limit of output signal
Realy_minLower limit of output signal
IntegerbitsNumber of bits (=0 means no quantization error)
BooleanunitDelaytrueTrue, if one sample period delay, = false, if computing time not modelled
IntegersampleFactor (from PartialDiscreteSISO_equality)1Sample factor (Ts = sampleFactor * sampleClock.sampleTime)
Modelica.Units.SI.TimeTs (from PartialDiscreteSISO_equality)sampleClock.sampleTime*sampleFactorSample time

Connectors

TypeNameDefaultDescription
Modelica.Blocks.Interfaces.RealInputu (from PartialDiscreteSISO_equality)Continuous or discrete input signal of block
Modelica.Blocks.Interfaces.RealOutputy (from PartialDiscreteSISO_equality)Continuous or discrete output signal of block